diff options
| author | Rodrigo Siqueira <[email protected]> | 2022-07-13 13:17:41 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-07-25 09:31:01 -0400 |
| commit | 074293dd9f61f11898f1f6e01f1560fd4c474025 (patch) | |
| tree | 63b3bb33f7323fdf4af04fb056ce8a59cd8a3b28 /tools/perf/scripts/python/stackcollapse.py | |
| parent | e6c64182ed946f1cb65799de9ee75f8bcc42b2c6 (diff) | |
drm/amd/display: Fix hard hang if DSC is disabled
We want to calculate the DTB clock values when DSC is enabled; however,
this is not the current behavior implemented in DCN32. Right now, DML is
trying to calculate DSC values even if DSC is disabled; as a result, we
can have a hard hang due to wrong clock calculation. This commit fixes
this issue by moving the calculation after the DSC check.
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions