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authorSean Christopherson <[email protected]>2023-01-07 01:10:25 +0000
committerSean Christopherson <[email protected]>2023-01-24 10:04:36 -0800
commit02efd818a6c095bcbf422f47fccc4ef27d53f344 (patch)
tree880c190678ec55fb5aaaeaf590798b4d7b5e71d1 /tools/perf/scripts/python/stackcollapse.py
parentc39857ce8daaaa429ccae2a393301ffeed67e235 (diff)
KVM: VMX: Intercept reads to invalid and write-only x2APIC registers
Intercept reads to invalid (non-existent) and write-only x2APIC registers when configuring VMX's MSR bitmaps for x2APIC+APICv. When APICv is fully enabled, Intel hardware doesn't validate the registers on RDMSR and instead blindly retrieves data from the vAPIC page, i.e. it's software's responsibility to intercept reads to non-existent and write-only MSRs. Fixes: 8d14695f9542 ("x86, apicv: add virtual x2apic support") Reviewed-by: Maxim Levitsky <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sean Christopherson <[email protected]>
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