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author | Lucas De Marchi <[email protected]> | 2020-10-06 17:22:07 -0700 |
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committer | Lucas De Marchi <[email protected]> | 2020-10-07 13:51:21 -0700 |
commit | fb7318c37afac6c6c7d18f893b3df962388cf763 (patch) | |
tree | fed9e572e462bc8e43035458ae53a76138b2864f /tools/perf/scripts/python/sctop.py | |
parent | eafeb204b4730bac1f1701183cd05c7fe2e81e0f (diff) |
drm/i915/dg1: gmbus pin mapping
Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
From spec we have registers GPIO_CTL[1-4], so we should not do the 4->9
mapping as in ICL/TGL.
The values for VBT seem wrong in BSpec. For the current boards we
actually have a 1:1 mapping.
BSpec: 49311, 49945, 20124
Cc: Aditya Swarup <[email protected]>
Cc: Matt Roper <[email protected]>
Signed-off-by: Lucas De Marchi <[email protected]>
Reviewed-by: Matt Roper <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions