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| author | Dmitry Baryshkov <[email protected]> | 2022-09-27 12:22:04 +0300 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2022-10-17 13:14:24 +0530 |
| commit | f5682f13b7ab0bbdffd11934afe4b5c011d5be74 (patch) | |
| tree | cb3ef857b7ca7ce0e38a01822b20749453e53ba2 /tools/perf/scripts/python/sctop.py | |
| parent | 11bf53a38c82baef349b4efc6a84f069dab7085a (diff) | |
phy: qcom-qmp-pcie: Support SM8450 PCIe1 PHY in EP mode
Add support for using PCIe1 (gen4x2) in EP mode on SM8450. The tables to
program are mostly common with the RC mode tables, so only register
difference are split into separate RC and EP tables.
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions