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author | Yoshihiro Shimoda <[email protected]> | 2023-10-18 17:56:18 +0900 |
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committer | Krzysztof Wilczyński <[email protected]> | 2023-10-20 12:12:24 +0000 |
commit | a9a1bcba90254975d4adbcca53f720318cf81c0c (patch) | |
tree | 47e2a37a8909a8b559549aef66a9bfaf101e5508 /tools/perf/scripts/python/sctop.py | |
parent | 164f66be0c2523e65df41b755c41b7c9ff58035a (diff) |
PCI: dwc: Add dw_pcie_link_set_max_link_width()
This is a preparation before adding the Max-Link-width capability
setup which would in its turn complete the max-link-width setup
procedure defined by Synopsys in the HW-manual.
Seeing there is a max-link-speed setup method defined in the DW PCIe
core driver it would be good to have a similar function for the link
width setup.
That's why we need to define a dedicated function first from already
implemented but incomplete link-width setting up code.
Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Yoshihiro Shimoda <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Serge Semin <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions