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author | Martin Schiller <[email protected]> | 2017-05-30 06:34:34 +0200 |
---|---|---|
committer | James Hogan <[email protected]> | 2017-11-07 22:40:15 +0000 |
commit | 44a374c0667df6b5de63266a4cf15f400827a29a (patch) | |
tree | 3d5a8b5133e05c3e8e0bbc69ef485c9ae9fdd1bb /tools/perf/scripts/python/sctop.py | |
parent | 8530762f2391164394fc8d99d7a5a55f521b6131 (diff) |
MIPS: Lantiq: Fix ASC0/ASC1 clocks
ASC1 is available on every Lantiq SoC (also AmazonSE) and should be
enabled like the other generic xway clocks instead of ASC0, which is
only available for AR9 and Danube.
Signed-off-by: Martin Schiller <[email protected]>
Acked-by: Hauke Mehrtens <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: John Crispin <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Felix Fietkau <[email protected]>
Cc: Martin Schiller <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/16145/
[[email protected]: Drop braces]
Signed-off-by: James Hogan <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
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