diff options
| author | Hawking Zhang <[email protected]> | 2020-12-01 23:30:12 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-12-23 15:05:02 -0500 |
| commit | 2d2fbf685c89865d839d5d6913ff1e765ab3d3c1 (patch) | |
| tree | 5744ca5de1a65c32614286482ef635d99a8b569c /tools/perf/scripts/python/sctop.py | |
| parent | fc4aa19f55af96ee7590554199a48cc9daf58a93 (diff) | |
drm/amdgpu: use cached ih rb control reg offsets for navi10
all the ih rb control register offsets are cached
at the beginning of navi10 ih_sw_init.
Signed-off-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Acked-by: Felix Kuehling <[email protected]>
Reviewed-by: Dennis Li <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions