staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts

As the __cacheline_aligned will ensure that the first of these two buffers
is appropriate aligned, there is no need to keep them as a single array
which is confusing given the first element is always tx and the second
rx.  Hence let us just have two parts and name them separately.

Signed-off-by: Jonathan Cameron <[email protected]>
Reviewed-by: Marcelo Schmitt <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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