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authorStephen Boyd <[email protected]>2020-11-02 10:11:41 -0800
committerSam Ravnborg <[email protected]>2020-11-07 12:06:03 +0100
commite4a6c18e60029ef8cccd5a50b24324082e10dbf0 (patch)
treec88dec1271068ff7e3ff9d222c4e25bf62ef1727 /tools/perf/scripts/python/sched-migration.py
parent0cbbd5b1a012cdc324187889956ff2632025cb17 (diff)
drm/bridge: ti-sn65dsi86: Combine register accesses in ti_sn_aux_transfer()
These register reads and writes are sometimes directly next to each other in the register address space. Let's use regmap bulk read/write APIs to get the data with one transfer instead of multiple i2c transfers. This helps cut down on the number of transfers in the case of something like reading an EDID where we read in blocks of 16 bytes at a time and the last for loop here is sending an i2c transfer for each of those 16 bytes, one at a time. Ouch! Changes in v3: - Undid changes in v2 Changes in v2: - Combined AUX_CMD register write Reviewed-by: Douglas Anderson <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Jonas Karlman <[email protected]> Cc: Jernej Skrabec <[email protected]> Cc: Sean Paul <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Signed-off-by: Stephen Boyd <[email protected]> Signed-off-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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