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authorBrett Creeley <[email protected]>2019-06-26 02:20:15 -0700
committerJeff Kirsher <[email protected]>2019-07-31 10:23:04 -0700
commitc31a5c25bb19c62d1cea69d3abcc7e0405bd4596 (patch)
tree7e49e09eb64209b2bd09ef384b767f86f4a392bc /tools/perf/scripts/python/sched-migration.py
parent17bc6d07212c8bc4521056a7f871d143192d385c (diff)
ice: Always set prefena when configuring an Rx queue
Currently we are always setting prefena to 0. This is causing the hardware to only fetch descriptors when there are none free in the cache for a received packet instead of prefetching when it has used the last descriptor regardless of incoming packets. Fix this by allowing the hardware to prefetch Rx descriptors. Signed-off-by: Brett Creeley <[email protected]> Tested-by: Andrew Bowers <[email protected]> Signed-off-by: Jeff Kirsher <[email protected]>
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