diff options
| author | Rohit Khaire <[email protected]> | 2021-06-04 11:02:56 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-06-08 14:03:55 -0400 |
| commit | c247c021b13a2ce40dd9ed06f1e18044dcaefd37 (patch) | |
| tree | 20df74a67b30a58b93d950f2bce2b4e4c67e69a4 /tools/perf/scripts/python/sched-migration.py | |
| parent | b71a52f44725a3efab9591621c9dd5f8f9f1b522 (diff) | |
drm/amdgpu: Fix incorrect register offsets for Sienna Cichlid
RLC_CP_SCHEDULERS and RLC_SPARE_INT0 have different
offsets for Sienna Cichlid
Signed-off-by: Rohit Khaire <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions