diff options
| author | Fenghua Yu <[email protected]> | 2023-10-10 12:42:39 +0200 |
|---|---|---|
| committer | Borislav Petkov (AMD) <[email protected]> | 2023-10-11 21:52:10 +0200 |
| commit | aaa5fa35743ab9f0726568611a85e3e15349b9bf (patch) | |
| tree | c1aacc4042bb469e7e78d0c3f5cdf97c6d163d42 /tools/perf/scripts/python/sched-migration.py | |
| parent | 4dba8f10b8fef9c5b0f9ed83dd1af91a1795ead1 (diff) | |
Documentation/x86: Document resctrl's new sparse_masks
The documentation mentions that non-contiguous bit masks are not
supported in Intel Cache Allocation Technology (CAT).
Update the documentation on how to determine if sparse bit masks are
allowed in L2 and L3 CAT.
Signed-off-by: Fenghua Yu <[email protected]>
Signed-off-by: Maciej Wieczor-Retman <[email protected]>
Signed-off-by: Borislav Petkov (AMD) <[email protected]>
Reviewed-by: Ilpo Järvinen <[email protected]>
Reviewed-by: Peter Newman <[email protected]>
Reviewed-by: Reinette Chatre <[email protected]>
Reviewed-by: Babu Moger <[email protected]>
Tested-by: Peter Newman <[email protected]>
Link: https://lore.kernel.org/r/3e9610997164f648e15c5c2e90d4944ce36504fe.1696934091.git.maciej.wieczor-retman@intel.com
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
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