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| author | Jitao Shi <jitao.shi@mediatek.com> | 2019-09-19 14:58:04 +0800 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2019-10-07 12:29:38 +0800 |
| commit | 7a5bc4e22ecfd74dc3662342beaa909770a3b786 (patch) | |
| tree | e96c0d7d11dd5c134f22f2dc5558a9dcbedd6f70 /tools/perf/scripts/python/sched-migration.py | |
| parent | e249e3e86b33386738e1ce4a37374aaea019a7e0 (diff) | |
drm/mediatek: change the dsi phytiming calculate method
Change the method of frame rate calc which can get more accurate
frame rate.
data rate = pixel_clock * bit_per_pixel / lanes
Adjust hfp_wc to adapt the additional phy_data
if MIPI_DSI_MODE_VIDEO_BURST
hfp_wc = hfp * bpp - data_phy_cycles * lanes - 12 - 6;
else
hfp_wc = hfp * bpp - data_phy_cycles * lanes - 12;
Note:
//(2: 1 for sync, 1 for phy idle)
data_phy_cycles = T_hs_exit + T_lpx + T_hs_prepare + T_hs_zero + 2;
bpp: bit per pixel
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Tested-by: Ryan Case <ryandcase@chromium.org>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions