diff options
| author | Junhao He <[email protected]> | 2023-01-14 17:16:32 +0800 |
|---|---|---|
| committer | Suzuki K Poulose <[email protected]> | 2023-01-16 10:06:06 +0000 |
| commit | 589d928248b72f8377d45904a14bcf686aa8bbeb (patch) | |
| tree | 13155e87f75435a41916c60dda418a0b5223fee7 /tools/perf/scripts/python/sched-migration.py | |
| parent | 88603b6dc419445847923fcb7fe5080067a30f98 (diff) | |
coresight: etm4x: Fix accesses to TRCSEQRSTEVR and TRCSEQSTR
The TRCSEQRSTEVR and TRCSEQSTR registers are not implemented if the
TRCIDR5.NUMSEQSTATE == 0. Skip accessing the registers in such cases.
Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver")
Signed-off-by: Junhao He <[email protected]>
Reviewed-by: Mike Leach <[email protected]>
Reviewed-by: Anshuman Khandual <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions