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| author | Ivaylo Ivanov <[email protected]> | 2024-10-23 12:09:01 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2024-11-04 02:02:42 +0100 |
| commit | 52fdb8d4388dd87c0290716ec21ee7756d12b8a3 (patch) | |
| tree | fd957357122b9338fd58e18b759c6f54e121d1c3 /tools/perf/scripts/python/sched-migration.py | |
| parent | cad4dda82c7eedcfc22597267e710ccbcf39d572 (diff) | |
dt-bindings: serial: samsung: Add samsung,exynos8895-uart compatible
Add dedicated samsung,exynos8895-uart compatible to the dt-schema for
representing uart of the Exynos8895 SoC.
Like GS101, it has a required DT property samsung,uart-fifosize, but
it does not exhibit the 32 bit register access limit.
Signed-off-by: Ivaylo Ivanov <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions