diff options
| author | Neil Armstrong <[email protected]> | 2023-11-14 11:14:45 +0100 |
|---|---|---|
| committer | Jerome Brunet <[email protected]> | 2023-11-24 18:08:48 +0100 |
| commit | 5205628ab0bfe64952974d476ee001f6c7e0ef7f (patch) | |
| tree | 7c22857d19438b923b889f22acb1d22eafa3f1e5 /tools/perf/scripts/python/sched-migration.py | |
| parent | 773e4e98730845dddab6b4accef03d03b6ff25ce (diff) | |
clk: meson: g12a: add CSI & ISP gates clocks
Add the gates entries for the CSI ISP domain and CSI PHYs.
[jbrunet: fixed checkpatch spelling warning]
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Daniel Scally <[email protected]>
Tested-by: Daniel Scally <[email protected]>
Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-3-223958791501@linaro.org
Signed-off-by: Jerome Brunet <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions