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| author | Jitao Shi <jitao.shi@mediatek.com> | 2019-08-11 18:40:04 +0800 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2019-10-07 12:29:38 +0800 |
| commit | 3c6bd94d32c45d47a0fce49e9cd64d72ff612bb5 (patch) | |
| tree | d107d2ebc75974d629fabfe807d633da7f8dab25 /tools/perf/scripts/python/sched-migration.py | |
| parent | 89d0e3f8825822ca20f3af2d61e5e1e6df4c2476 (diff) | |
drm/mediatek: add dsi reg commit disable control
New DSI IP has shadow register and working reg. The register
values are writen to shadow register. And then trigger with
commit reg, the register values will be moved working register.
This function is default on. But this driver doesn't use this
function. So add the disable control.
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions