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| author | Benjamin Gaignard <benjamin.gaignard@collabora.com> | 2023-10-05 16:51:16 +0200 |
|---|---|---|
| committer | Hans Verkuil <hverkuil-cisco@xs4all.nl> | 2023-10-13 11:33:22 +0200 |
| commit | 39377f84fb98561b86b645f0b7c33512eba7afaf (patch) | |
| tree | aedfb28ffdd25df8bcdb11c2c93bfc6e27cb163c /tools/perf/scripts/python/sched-migration.py | |
| parent | feec1b29d7a81be3c1a0a0865eed67d05d4089c9 (diff) | |
media: verisilicon: Fixes clock list for rk3588 av1 decoder
Mainlined RK3588 clock driver manage by itself the dependency between
aclk/hclk and their root clocks (aclk_vdpu_root/hclk_vdpu_root).
RK3588 av1 video decoder do not have to take care of it anymore so
remove them from the list and be compliant with yaml bindings description.
Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions