diff options
| author | Allen Yan <[email protected]> | 2017-10-13 11:01:52 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2017-10-20 14:20:06 +0200 |
| commit | 2ff23c48028a77114757438f9a480c453f68d4b0 (patch) | |
| tree | 70ca1e280798a869cd6b35a65f54a4501186d1b9 /tools/perf/scripts/python/sched-migration.py | |
| parent | 68a0db1d7da20fc99b64debddf71e7c6d1b9e334 (diff) | |
serial: mvebu-uart: clear state register before IRQ request
When receiving data on RX pin before ->uart_startup() is called, some
error bits in the state register could be set up (like BRK_DET).
This is harmless when using only the standard UART (error bits are
read-only), but may procude an endless loop once in the extended UART
RX interrupt handler (error bits must be cleared).
Clear the status register in ->uart_startup() to avoid this situation.
Signed-off-by: Allen Yan <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Reviewed-by: Gregory CLEMENT <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions