diff options
| author | Jiaxin Yu <[email protected]> | 2022-11-24 10:30:50 +0800 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2022-11-24 15:29:38 +0000 |
| commit | 248579fc9a4f3bf36e7cfe9f6a354cee0f9848dc (patch) | |
| tree | 2d99e3827c50994cf9f0652ecd7b66a1d7bb1225 /tools/perf/scripts/python/sched-migration.py | |
| parent | b992f35568cb5768c5944fc3b4f02df337dc1ece (diff) | |
ASoC: mediatek: mt8186: Correct I2S shared clocks
In mt8186 platform, I2S2 should be the main I2S port that provide
the clock, on the contrary I2S3 should be the second I2S port that
use this clock.
Fixes: 9986bdaee477 ("ASoC: mediatek: mt8186: Configure shared clocks")
Signed-off-by: Jiaxin Yu <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions