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authorRoger Quadros <[email protected]>2014-07-06 15:51:24 -0600
committerPaul Walmsley <[email protected]>2014-07-06 15:51:24 -0600
commit1ea0999e085acb5dacaff163c3941b1d91d59c89 (patch)
treead56ecc287e5e54563b9ff22440d712a1ca9fe59 /tools/perf/scripts/python/sched-migration.py
parent0cd8d4052ae4c690fc3ea6133a0ad5404360308d (diff)
ARM: DRA7: hwmod: Fixup SATA hwmod
Get rid of optional clock as that is now managed by the AHCI platform driver. Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..) is passed as the second memory resource in the device tree. Signed-off-by: Roger Quadros <[email protected]> Reviewed-by: Rajendra Nayak <[email protected]> Tested-by: Sekhar Nori <[email protected]> Signed-off-by: Paul Walmsley <[email protected]>
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