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| author | Kuro Chung <kuro.chung@ite.com.tw> | 2024-06-04 10:44:05 +0800 |
|---|---|---|
| committer | Robert Foss <rfoss@kernel.org> | 2024-06-10 16:36:45 +0200 |
| commit | 8814444e62b8a8b573fba2cbbb327d5817b74eb0 (patch) | |
| tree | 8cb33d1dc2b47c533456b97ac0201ed0aaa8db80 /tools/perf/scripts/python/parallel-perf.py | |
| parent | 9a8ac1ec9efddce525c94822028fb6140c523be0 (diff) | |
drm/bridge: it6505: update usleep_range for RC circuit charge time
The spec of timing between IVDD/OVDD and SYSRTEN is 10ms, but SYSRSTN RC
circuit need at least 25ms for rising time, update for match spec
Signed-off-by: Kuro Chung <kuro.chung@ite.com.tw>
Signed-off-by: Hermes Wu <hermes.wu@ite.com.tw>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240604024405.1122488-1-kuro.chung@ite.com.tw
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions