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authorNiklas Söderlund <[email protected]>2024-10-02 11:23:27 +0200
committerMauro Carvalho Chehab <[email protected]>2024-10-16 09:32:38 +0200
commit708cef6d4df47735127ab392e0c96674c7325cc1 (patch)
treeb0a26dca4373015bd3bda0dd1c2282a630639b88 /tools/perf/scripts/python/parallel-perf.py
parent7e86c7a520b9226b39785e9f9ed330ffb48babe2 (diff)
dt-bindings: i2c: maxim,max96712: Add compatible for MAX96724
The MAX96712 and MAX96724 are both quad GMSL2 to CSI-2 deserializers and are in parts similar, but not identical. The most obvious difference is on the CSI-2 side where the MAX96712 have 4 PHYs and support D-PHY with 1x4, 2x2 and 4x2 lanes where the MAX96724 only have 2 PHYs and supports D-PHY with 2x4 or 4x2 lanes. The register layout overlap in part but there are differences and holes. Most of the differences are related to the different number of CSI-2 PHYs, but there are other capability differences between the two. Add a specific compatible for MAX96724 to the max96712 bindings. The bindings do not yet support validating all DT properties to limit it the each devices capabilities. However to allow for this in future a specific compatible for the two different devices are needed. Signed-off-by: Niklas Söderlund <[email protected]> Acked-by: Conor Dooley <[email protected]> Signed-off-by: Sakari Ailus <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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