aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/parallel-perf.py
diff options
context:
space:
mode:
authorMinda Chen <minda.chen@starfivetech.com>2024-03-28 17:18:28 +0800
committerBjorn Helgaas <bhelgaas@google.com>2024-05-28 11:15:29 -0500
commit5037ec713a8465536ab8fc1bdd8cfbc1712ea681 (patch)
tree1764f2e5092ac26d1b108b15708d8537930b414d /tools/perf/scripts/python/parallel-perf.py
parentc7f6c72ae167a428fa1b9150b9fee7c740dac5bc (diff)
PCI: microchip: Add event irqchip field to host port and add PLDA irqchip
As the PLDA DT binding doc (Documentation/devicetree/bindings/pci/ plda,xpressrich3-axi-common.yaml) shows, PLDA PCIe contains an interrupt controller. Microchip PolarFire PCIe event IRQs include PLDA interrupts and PolarFire additional interrupts. The interrupt irqchip ops includes ack/mask/unmask interrupt ops, which will write correct registers. Microchip PolarFire PCIe additional interrupts require to write PolarFire SoC self-defined registers. So Microchip PCIe event irqchip ops can not be re-used. Microchip PolarFire PCIe additional interrupts (defined in drivers/pci/controller/plda/pcie-microchip-host.c): EVENT_PCIE_L2_EXIT EVENT_PCIE_HOTRST_EXIT EVENT_PCIE_DLUP_EXIT EVENT_SEC_TX_RAM_SEC_ERR EVENT_SEC_RX_RAM_SEC_ERR ... To support PLDA its own event IRQ process, implements PLDA irqchip ops and add event irqchip field to struct pcie_plda_rp. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20240328091835.14797-16-minda.chen@starfivetech.com Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Signed-off-by: Krzysztof WilczyƄski <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions