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authorNeil Armstrong <[email protected]>2019-06-12 10:51:47 +0200
committerAndrzej Hajda <[email protected]>2019-07-01 12:33:19 +0200
commitfdbdcc83ffd7d00265a531e71f1d166566c09d66 (patch)
tree26399225c5740d4cbbd01a0a92d1425ebb2ef086 /tools/perf/scripts/python/netdev-times.py
parent52c2197aae1b9809830d59bc8f5fa95f7372b0c7 (diff)
drm/bridge: dw-hdmi: Use automatic CTS generation mode when using non-AHB audio
When using an I2S source using a different clock source (usually the I2S audio HW uses dedicated PLLs, different from the HDMI PHY PLL), fixed CTS values will cause some frequent audio drop-out and glitches as reported on Amlogic, Allwinner and Rockchip SoCs setups. Setting the CTS in automatic mode will let the HDMI controller generate automatically the CTS value to match the input audio clock. The DesignWare DW-HDMI User Guide explains: For Automatic CTS generation Write "0" on the bit field "CTS_manual", Register 0x3205: AUD_CTS3 The DesignWare DW-HDMI Databook explains : If "CTS_manual" bit equals 0b this registers contains "audCTS[19:0]" generated by the Cycle time counter according to specified timing. Cc: Jernej Skrabec <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Jonas Karlman <[email protected]> Cc: Heiko Stuebner <[email protected]> Cc: Jerome Brunet <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Jernej Skrabec <[email protected]> Reviewed-by: Jernej Skrabec <[email protected]> Tested-by: Douglas Anderson <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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