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| author | Geert Uytterhoeven <[email protected]> | 2015-10-16 11:41:19 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2017-05-24 10:19:42 +0200 |
| commit | cedd162b4dae134a9c5862109afd9ee95bd73520 (patch) | |
| tree | 5c1c9f41e077e49a486c8772a586d5393f1ea473 /tools/perf/scripts/python/netdev-times.py | |
| parent | 4013047a65b376b960a2144b3d125944c8c280bc (diff) | |
clk: renesas: Add r8a7790 CPG Core Clock Definitions
Add all R-Car H2 Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2a ("List of Clocks [R-Car H2]") of the R-Car Gen2 Hardware
User's Manual rev. 2.00.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Reviewed-by: Niklas Söderlund <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions