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| author | Yinbo Zhu <[email protected]> | 2019-03-11 02:16:47 +0000 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2019-04-15 11:55:54 +0200 |
| commit | b214fe592ab72a20d93ab4b252c8ff4607512633 (patch) | |
| tree | 8f9e6bcf21ddbaddf8aee85768d16e9ee8d810b0 /tools/perf/scripts/python/netdev-times.py | |
| parent | 5dd195522562542bc6ebe6e7bd47890d8b7ca93c (diff) | |
mmc: sdhci-of-esdhc: add erratum eSDHC7 support
Invalid Transfer Complete (IRQSTAT[TC]) bit could be set during
multi-write operation even when the BLK_CNT in BLKATTR register
has not reached zero. Therefore, Transfer Complete might be
reported twice due to this erratum since a valid Transfer Complete
occurs when BLK_CNT reaches zero. This erratum is to fix this issue
Signed-off-by: Yinbo Zhu <[email protected]>
Acked-by: Adrian Hunter <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions