diff options
| author | Yang Ling <[email protected]> | 2016-05-19 12:22:19 +0800 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2016-10-04 16:13:57 +0200 |
| commit | a1ca83869d4ea65afd5a6a403d5d5ec2c41ef60e (patch) | |
| tree | 5803546b32133f709de02942cb031850b0e4455a /tools/perf/scripts/python/netdev-times.py | |
| parent | fd6ecf42fb345e5a53fa2edc91162022e31cee41 (diff) | |
MIPS: Add CPU support for Loongson1C
Loongson1C is a 32-bit SoC designed by Loongson Technology Co., Ltd,
with many features similar to Loongson1B.
Signed-off-by: Yang Ling <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/13303/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions