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authorZhenGuo Yin <[email protected]>2023-08-28 14:18:52 +0800
committerAlex Deucher <[email protected]>2023-08-30 15:51:16 -0400
commit9f05cfc78c6880e06940ea78fbc43f6392710f17 (patch)
tree487f3f0fb763ba038e4f78212142aba7801f5370 /tools/perf/scripts/python/netdev-times.py
parent668dfc4533262b169554f0b8dedb5ce3545d5d06 (diff)
drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtime
Register RLC_SPM_MC_CNTL is not blocked by L1 policy, VF can directly access it through MMIO during SRIOV runtime. v2: use SOC15 interface to access registers Acked-by: Alex Deucher <[email protected]> Signed-off-by: ZhenGuo Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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