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| author | Ben Skeggs <[email protected]> | 2015-08-21 10:52:54 +1000 |
|---|---|---|
| committer | Ben Skeggs <[email protected]> | 2015-08-28 12:40:04 +1000 |
| commit | 7c11c99b3c66a8e03494e56ce6e6c5303ee85934 (patch) | |
| tree | 91544659d7d350259d9c871e09f508e49dd90925 /tools/perf/scripts/python/netdev-times.py | |
| parent | 895fb8e6f77589b9c50ff1f231b5025935d1d59f (diff) | |
drm/nouveau/bios/dcb: accept "maxwell" lane count values for dcb 4.0
We previously assumed that the values "2" and "4" were new in DCB 4.1,
however, there's at least one GM107 DCB 4.0 board (Quadro K620) that
uses the newer values.
Signed-off-by: Ben Skeggs <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions