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authorPaul Burton <[email protected]>2014-01-15 10:31:47 +0000
committerRalf Baechle <[email protected]>2014-03-06 21:25:22 +0100
commit4dd8ee5db10c9f287e9c925e3e98f3907bd1890d (patch)
tree9b6d85af01be51c25442abf8ea8d5a3bcea9125b /tools/perf/scripts/python/netdev-times.py
parent20a8d5d505c474c807b2b9831d6a5d3fca3c656d (diff)
MIPS: Add CP0 CMGCRBase definitions & accessor
The CMGCRBase register is defined by the PRA specification as an optional register which indicates the physical base of the MIPS Coherence Manager Global Control Register block. This patch simply adds a definition for the base address field within the register, along with an accessor function for reading the register. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6356/ Signed-off-by: Ralf Baechle <[email protected]>
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