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authorMaciej W. Rozycki <[email protected]>2014-11-21 14:10:08 +0000
committerDavid S. Miller <[email protected]>2014-11-21 16:37:13 -0500
commit4d0438e56a8f9a1a18ba31bd53b9dc67af224980 (patch)
tree2658bdb4bef662c7febf304de65b6bd15a05dd32 /tools/perf/scripts/python/netdev-times.py
parent6a931423c918633d4d0cda96df042d7e44ad06b0 (diff)
defxx: Clean up DEFEA resource management
Reserve DEFEA resources according to actual use. There are three regions, for the ESIC ASIC's CSRs, for the discrete Burst Holdoff register, and for the PDQ ASIC's CSRs. The latter is mapped in the memory or port I/O address space depending on configuration. The two formers are hardwired and always mapped in the port I/O address space. Signed-off-by: Maciej W. Rozycki <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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