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authorAndrew Donnellan <[email protected]>2015-11-04 13:24:09 +1100
committerMichael Ellerman <[email protected]>2015-11-24 14:21:27 +1100
commit48f0f6b717e314a30be121b67e1d044f6d311d66 (patch)
treec70bc458ed5dad06c56c42d3812e354808fdd0ea /tools/perf/scripts/python/netdev-times.py
parent1b5df59e50874b9034c0fa389cd52b65f1f93292 (diff)
cxl: use correct operator when writing pcie config space values
When writing a value to config space, cxl_pcie_write_config() calls cxl_pcie_config_info() to obtain a mask and shift value, shifts the new value accordingly, then uses the mask to combine the shifted value with the existing value at the address as part of a read-modify-write pattern. Currently, we use a logical OR operator rather than a bitwise OR operator, which means any use of this function results in an incorrect value being written. Replace the logical OR operator with a bitwise OR operator so the value is written correctly. Reported-by: Michael Ellerman <[email protected]> Cc: [email protected] Fixes: 6f7f0b3df6d4 ("cxl: Add AFU virtual PHB and kernel API") Signed-off-by: Andrew Donnellan <[email protected]> Acked-by: Ian Munsie <[email protected]> Signed-off-by: Michael Ellerman <[email protected]>
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