staging: mt7621-spi: drop the broken full-duplex mode

According to John Crispin (aka blogic) on IRC on Nov 26 2018:
  so basically i made cs1 work for MTK/labs when i built
  the linkit smart for them. the req-sheet said that cs1 should be proper
  duplex spi. however ....
   1) the core will always send 1 byte before any transfer, this is the
      m25p80 command.
   2) mode 3 is broken and bit reversed (?)
   3) some bit are incorrectly wired in hw for mode2/3
  we wrote a test script and test for [0-0xffff] on all modes and certain
  bits are swizzled under certain conditions and it was not possible to
  fix this even using a hack.
  we then decided to use spi-gpio and i never removed the errornous code
  basically the spi is fecked for anything but half duplex spi mode0
  running a sflash on it

The controller will always send some data from OPCODE register under half
duplex mode before starting a full-duplex transfer, so the full-duplex
mode is broken.
This piece of code also make CS1 unavailable since it forces the
broken full-duplex mode to be used on CS1.

Signed-off-by: Chuanhong Guo <[email protected]>
Reviewed-by: NeilBrown <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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