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authorInochi Amaoto <[email protected]>2024-10-24 14:21:03 +0800
committerGreg Kroah-Hartman <[email protected]>2024-11-04 02:02:21 +0100
commitcad4dda82c7eedcfc22597267e710ccbcf39d572 (patch)
tree1e8a632e6be896754849ca6506ceab5a89a30b59 /tools/perf/scripts/python/net_dropmonitor.py
parenta54108ca42eabb54d34674c790d06d07256f570d (diff)
serial: 8250_dw: Add Sophgo SG2044 quirk
SG2044 relys on an internal divisor when calculating bitrate, which means a wrong clock for the most common bitrates. So add a quirk for this uart device to skip the set rate call and only relys on the internal UART divisor. Reviewed-by: Andy Shevchenko <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Inochi Amaoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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