diff options
| author | Arun Siluvery <[email protected]> | 2015-06-19 18:37:13 +0100 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2015-06-23 14:01:41 +0200 |
| commit | c82435bbe5aca62fc54615ff8ba78134bfa33866 (patch) | |
| tree | a15b8966a3f960af551c7c80128e043997fe949f /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 7ad00d1ac12bf461d0f0b69bf4e0e883b9e23c53 (diff) | |
drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround
In Indirect context w/a batch buffer,
+WaFlushCoherentL3CacheLinesAtContextSwitch:bdw
v2: Add LRI commands to set/reset bit that invalidates coherent lines,
update WA to include programming restrictions and exclude CHV as
it is not required (Ville)
v3: Avoid unnecessary read when it can be done by reading register once (Chris).
Cc: Chris Wilson <[email protected]>
Cc: Dave Gordon <[email protected]>
Signed-off-by: Rafael Barbalho <[email protected]>
Signed-off-by: Arun Siluvery <[email protected]>
Acked-by: Chris Wilson <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions