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authorDillon Varone <[email protected]>2022-09-19 13:14:02 -0400
committerAlex Deucher <[email protected]>2022-10-06 11:57:43 -0400
commitc1969fbaa57d88ddef626bb8ae313d38478d8631 (patch)
tree712b7ab5cda9d4f8ef8c146955af1453d9e90fa1 /tools/perf/scripts/python/net_dropmonitor.py
parentf7367b5fe0e38af02d6915a355f2ee63b172c9ac (diff)
drm/amd/display: Reorder FCLK P-state switch sequence for DCN32
[WHY?] In some cases, DCFCLK hardmin requests are not acknowledged by SMU as the requested clock does not have a compatible ratio with current FCLK, and it cannot be changed as FCLK P-state is not allowed. [HOW?] Allow FCLK p-state change prior to changing DCFCLK hardmin. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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