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author | Eugen Hristev <eugen.hristev@microchip.com> | 2020-11-13 15:24:29 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2020-11-24 16:03:51 +0100 |
commit | b6071c8914648703e7c7f7fd9d06a16a0ad030e9 (patch) | |
tree | a86ade50037350baeea41d53367d6a6a196da596 /tools/perf/scripts/python/net_dropmonitor.py | |
parent | c0802b721c7d3257aeb459c3a6b8036e91851ee4 (diff) |
pinctrl: at91-pio4: add support for fewer lines on last PIO bank
Some products, like sama7g5, do not have a full last bank of PIO lines.
In this case for example, sama7g5 only has 8 lines for the PE bank.
PA0-31, PB0-31, PC0-31, PD0-31, PE0-7, in total 136 lines.
To cope with this situation, added a data attribute that is product dependent,
to specify the number of lines of the last bank.
In case this number is different from the macro ATMEL_PIO_NPINS_PER_BANK,
adjust the total number of lines accordingly.
This will avoid advertising 160 lines instead of the actual 136, as this
product supports, and to avoid reading/writing to invalid register addresses.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20201113132429.420940-1-eugen.hristev@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions