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author | Baptiste Reynal <[email protected]> | 2015-03-04 16:51:06 +0100 |
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committer | Joerg Roedel <[email protected]> | 2015-03-23 15:21:26 +0100 |
commit | 83a60ed8f0b5ce550afd5802b60468578db4e055 (patch) | |
tree | 9794a804ce571a32042363c983aa00a3d9c3c7a7 /tools/perf/scripts/python/net_dropmonitor.py | |
parent | bc465aa9d045feb0e13b4a8f32cc33c1943f62d6 (diff) |
iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition
This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.
Also, we check that the domain is a stage-1 domain.
Signed-off-by: Baptiste Reynal <[email protected]>
Acked-by: Will Deacon <[email protected]>
Signed-off-by: Joerg Roedel <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions