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authorStefan Brüns <stefan.bruens@rwth-aachen.de>2017-09-28 03:49:19 +0200
committerVinod Koul <vinod.koul@intel.com>2017-10-16 12:31:24 +0530
commit5a6a6202fa9ab63bce1726663ff5573741bfeab3 (patch)
tree99c41acf42666ebbf35594bd5d62f4548341c553 /tools/perf/scripts/python/net_dropmonitor.py
parent50b12497547b5bff49bf90d54c2ca6a77c0bbe02 (diff)
dmaengine: sun6i: Correct burst length field offsets for H3
For the H3, the burst lengths field offsets in the channel configuration register differs from earlier SoC generations. Using the A31 register macros actually configured the H3 controller do to bursts of length 1 always, which although working leads to higher bus utilisation. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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