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| author | Chris Wilson <[email protected]> | 2019-12-06 10:55:23 +0000 |
|---|---|---|
| committer | Chris Wilson <[email protected]> | 2019-12-06 11:39:12 +0000 |
| commit | 1a74934b0effbd979c520e1122b680624a1a6372 (patch) | |
| tree | fc190292e6a2568ca18b188eafcc7ed2446f402e /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 045d1fb79616f138a2e51f04537acd40b9a38ce0 (diff) | |
drm/i915/gem: Flush the pwrite through the chipset before signaling
Before we signal the fence to indicate completion, ensure the pwrite
through the indirect GGTT is coherent (as best as we know) in memory.
Any listeners to the fence may start immediately and sample from the
backing store prior to the writes being posted, thus seeing stale data.
Signed-off-by: Chris Wilson <[email protected]>
Reviewed-by: Tvrtko Ursulin <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions