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| author | David Virag <virag.david003@gmail.com> | 2024-08-16 19:50:32 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-08-21 13:20:08 +0200 |
| commit | 011a9de99793c3a2ee612ff3e0ce293dcbea6df0 (patch) | |
| tree | dd9e3373a3629b4772ad03ef0e3d2551c30e58fc /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 4e39e5b84361924006f4d7cf81e049a2793079a6 (diff) | |
clk: samsung: exynos7885: Add USB related clocks to CMU_FSYS
Exynos7885 SoC has a DWC3 USB Controller with Exynos USB PHY which in
theory supports USB3 SuperSpeed, but is only used as USB2 in all known
devices.
These clocks are needed for everything related to USB.
While at it, also remove the CLK_SET_RATE_PARENT capability of
CLK_MOUT_FSYS_USB30DRD_USER, since it's not actually needed.
Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20240816175034.769628-3-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions