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| author | Lubomir Rintel <lkundrak@v3.sk> | 2020-03-09 20:42:42 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-03-20 18:19:31 -0700 |
| commit | ea56ad60260ec767d9a93f71f7baabcb618eb92d (patch) | |
| tree | 9a1bd58baed1c90613bc4d20fdda15fffee5b572 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 5d34d0b32d6c13947b0aa890fc4c68f203491169 (diff) | |
clk: mmp2: Stop pretending PLL outputs are constant
The hardcoded values for PLL1 and PLL2 are wrong. PLL1 is slightly
off -- it defaults to 797.33 MHz, not 800 MHz. PLL2 is disabled by default,
but also configurable.
Tested on a MMP2-based OLPC XO-1.75 laptop, with PLL1=797.33 and various
values of PLL2 set via set-pll2-520mhz, set-pll2-910mhz and
set-pll2-988mhz Open Firmware words.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200309194254.29009-6-lkundrak@v3.sk
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions