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| author | Pali Rohár <pali@kernel.org> | 2022-04-12 11:49:43 +0200 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2022-04-25 10:53:38 +0100 |
| commit | e8e7fbb6a39cd6761c843d97851eb40c5885e922 (patch) | |
| tree | a1215fb11f73286de86b7f5f9a36a8f94d184035 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 3123109284176b1532874591f7c81f3837bbdc17 (diff) | |
PCI: Add PCI_EXP_SLTCTL_ASPL_DISABLE macro
Add macro defining Auto Slot Power Limit Disable bit in Slot Control
Register.
Link: https://lore.kernel.org/r/20220412094946.27069-2-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions