diff options
| author | Jani Nikula <[email protected]> | 2021-09-09 15:52:04 +0300 |
|---|---|---|
| committer | Jani Nikula <[email protected]> | 2021-09-20 18:47:00 +0300 |
| commit | e01163e82b708535ae1bfca67730516578b237be (patch) | |
| tree | 9ee70c7e8cce7eba953be67ae0d582577b8467d6 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 652135940ee20e2aaa4c628d13b3fb2b53770cab (diff) | |
drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH,LOW} for 128b/132b
There's a new register pair for 128b/132b mode where you need to set the
pixel clock in Hz.
v2: Fix UHBR rate check, use intel_dp_is_uhbr() helper
Bspec: 54128
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/a2902cc188973f022f282f2a77e693afdecefb5a.1631191763.git.jani.nikula@intel.com
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions