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| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-02-22 12:05:35 -0800 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-02-27 15:54:30 -0800 |
| commit | d66047e4a582103d4c6a884692f402b905032f26 (patch) | |
| tree | 89833a5f480102076e7b52770a5846da07313687 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | c4932d7956d8226e20c0c44b04fe9a2cbfcd8f51 (diff) | |
drm/i915/cnl: Add WaRsDisableCoarsePowerGating
Old Wa added now forever on CNL all steppings.
With CPU P states enabled along with RC6, dispatcher
hangs can happen.
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180222200535.9290-1-rodrigo.vivi@intel.com
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions