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authorOder Chiou <[email protected]>2020-06-04 15:10:16 +0800
committerMark Brown <[email protected]>2020-06-04 14:42:29 +0100
commitd605cbb64252071d6a74b4fbb626e1473d91838d (patch)
tree64a8e042e2b9327223e95f80742651363d866e80 /tools/perf/scripts/python/mem-phys-addr.py
parenta6b675a89e51a1cdad0481b809b7840d3f86e4b5 (diff)
ASoC: rl6231: Modify the target DMIC clock rate
Some DMIC components will not work correctly in the clock rate 3.072MHz. We recommend the clock rate 1.536MHz in the gerenal case. Signed-off-by: Oder Chiou <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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