diff options
| author | Dmitry Baryshkov <[email protected]> | 2023-01-11 08:03:57 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-01-18 18:27:35 -0600 |
| commit | cc0269b7604ef193cc5b230b86713baf1ce13a26 (patch) | |
| tree | 9ee3226742343841b7172b9cb7d5d55e565486f6 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 7179ab686d7853c4768cd45070e8f4068942d8c6 (diff) | |
clk: qcom: gcc-apq8084: add GCC_MMSS_GPLL0_CLK_SRC
Add the GCC_MMSS_GPLL0_CLK_SRC, the branch clock gating gpll0 clock for
the multimedia subsystem.
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions