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author | Frank Oltmanns <frank@oltmanns.dev> | 2024-03-10 14:21:11 +0100 |
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committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2024-04-15 23:21:45 +0200 |
commit | b914ec33b391ec766545a41f0cfc0de3e0b388d7 (patch) | |
tree | 7c762ac6971c9edb151cbee72397b97bdeef44b5 /tools/perf/scripts/python/mem-phys-addr.py | |
parent | 7e91ed763dc07437777bd012af7a2bd4493731ff (diff) |
clk: sunxi-ng: common: Support minimum and maximum rate
The Allwinner SoC's typically have an upper and lower limit for their
clocks' rates. Up until now, support for that has been implemented
separately for each clock type.
Implement that functionality in the sunxi-ng's common part making use of
the CCF rate liming capabilities, so that it is available for all clock
types.
Suggested-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Cc: stable@vger.kernel.org
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-1-46fc80c83637@oltmanns.dev
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions