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| author | Paul Cercueil <paul@crapouillou.net> | 2020-12-11 23:28:10 +0000 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-01-04 15:34:16 +0100 |
| commit | b4aa4876e58d12fb3ace425969dcbf4df37aa254 (patch) | |
| tree | 119cb31795fc15823bb5a9f5faff711016abccd9 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 9a85c09a3f507b925d75cb0c7c8f364467038052 (diff) | |
pinctrl: ingenic: Rename registers from JZ4760_GPIO_* to JZ4770_GPIO_*
Now that JZ4760 support has been fixed, it looks wrong to have
JZ4760_GPIO_* registers being written if the SoC is a JZ4770 or later.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20201211232810.261565-2-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions